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MOCK QA Digital Electronics

<< Obtain the minimal SOP expression for (0, 1, 2, 4, 6, 9. 11, 12, 13) and implement it in NAND logic.  >>

Module: Minimization of Logic Function

Realize OR, AND, NOT, NOR gates using NAND gates only. 

(i) OR gate using NAND only:


(ii) AND gate using NAND only:

(iii) NOT gate using NAND only.:

(iv) NOR gate using NAND only:

More Mock QA from Digital Electronics

Draw the schematic of ECL OR gate and explain its operation. 

Draw and explain the operation of TTL inverter. 

What is the minimum voltage value that is considered as high-stage input in case of TTL logic family? 

Convert (0.122)10 = (?)16 

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